aarch64: remove MInst::Extend

[Rafferty97]

Motivation

My last PR (#14187) introduced MInst::BitfieldMove to represent all instances of the ubfm and sbfm instructions. As a result, zero- and sign-extensions can now be expressed as MInst::BitfieldMove or MInst::Mov directly, making the MInst::Extend variant redundant, so this PR removes it.

Changes

I have removed the MInst::Extend variant, and replaced sites that constructed it with calls to MInst::gen_extend,
which produces a MInst::BitfieldMove or MInst::Mov as necessary.

I've also reimplemented the extend helper function defined in ISLE in a similar fashion, and added a helper
in the process (u8_into_uimm6).

The code that performed code generation for MInst::Extend had special-cased the case where from_bits == 1,
producing an and instruction rather than a ubfm instruction on performance grounds. I haven't carried this over to the new gen_extend function as it would be unreachable in practice. (Claude tells me this is a relic from when boolean types like b1 existed and was now effectively dead code, but I haven't confirmed this myself.)

I've changed the test cases in codegen/src/isa/aarch64/inst/emit_tests.rs that exercised MInst::Extend
to use MInst::BitfieldMove instead, and removed the cases that lowered to different instructions, as those
cases should already be covered elsewhere. I also added a few extra cases with immr != 0 for better coverage.

To preserve the behaviour of print_with_state, I've added a special case to the MInst::BitfieldMove branch
that prints the appropriate aliases for ubfm/sbfm such that all the file tests still pass without adjustment.

Finally, in order to get isle/veri/isaspec/script/generate.sh -l to work, I had to replace a few
instances of std::fmt with core::fmt. This isn't related to these changes, so I can separate it into a separate PR if that's preferred.

Verification

In removing MInst::Extend, I necessarily also had to remove the code that generated the extend.isle spec file. To avoid a verification regression, I've added limited verification of MInst::BitfieldMove, restricted to just the cases needed for zero-/sign-extension.

This is also the part I'm most unsure about, so I'm more than open to feedback.

Future work

I dug a bit deeper into the optimisation of using and in place of ubfm when zero-extending a 1-bit input,
and it seems the rationale is sound and extends to zero-extending any input (other than 32-bit to 64-bit, which is a mov). It seems LLVM does this for all aarch64 targets, which is evidence that it's a worthwhile optimisation to consider for a future PR.

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This issue or pull request has been labeled: "cranelift", "cranelift:area:aarch64", "cranelift:meta", "isle", "winch"

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