Issues

• ld pin missing in RAM "Separate load and store ports" mode (Regression since 2.16.1.4)

  Logisim-Ita/Logisim#46 · Filter by author KEDIT2007 opened on May 16, 2026

• A Defect in the Simulation of Transistors

  Logisim-Ita/Logisim#39 · Filter by author Pure-Happiness opened on Mar 30, 2025

• error in xor and xnor gate output with 3 inputs

  Logisim-Ita/Logisim#36 · Filter by author yamel-panda opened on Oct 5, 2023

• PLA ROM in subcircuit makes clock stop working

  Logisim-Ita/Logisim#22 · Filter by author maehne opened on Nov 2, 2021

• Need support for Hi-dpi

  Logisim-Ita/Logisim#19 · Filter by author ZJsheep opened on Apr 27, 2021

• Input/Output Pin

  Logisim-Ita/Logisim#16 · Filter by author JimmyDansbo opened on Aug 28, 2020
  1

• wire's colors change when you move it

  Logisim-Ita/Logisim#12 · Filter by author piegala opened on Dec 24, 2019
  2

• ROM bug

  Logisim-Ita/Logisim#7 · Filter by author argjenddalti opened on Oct 18, 2018

• Tick Frequency

  Logisim-Ita/Logisim#6 · Filter by author StuartP119 opened on Jun 15, 2018
  2